In the continuing miniaturization of semiconductor devices, one of the keys to shrinking device geometries is the ability to construct very dense contact or interconnect structures such as that used in a multi-level metallization schemes. The critical processing step involves etching the contacts and interconnects to a dimension as small as 0.35 .mu.m or even 0.25 .mu.m in diameter in applications for a 64 or 256 megabit DRAMs or other high-density logic devices. To fully implement the process, high selectivity of oxide to the underlying polysilicon or silicide is a key requirement. A high-density plasma etch process utilizing fluorine chemistry is ideal for the high selectivity etch process. A suitable equipment to be used for the process is supplied by the Applied Materials, Inc. of Santa Clara, Calif. Under the tradename of Centura Omega.TM. dielectric etch system. For instance, an oxide etch process can be performed in such an equipment by etching 8,000 .ANG. to 12,000 .ANG. of doped oxide down to a nitride layer. The etch step uses a well-characterized C.sub.2 F.sub.6 or C.sub.3 F.sub.8 chemistry to etch the oxide and stopping at the nitride layer. In order to avoid or to minimize a polymer film deposition during the etch process, a high density plasma source powered by a 2 MHZ RF signal is used. The source generates an ion density of about 1.times.10.sup.12 cm.sup.-3. Free fluorine atoms are removed or scavenged from the reaction chamber through the use of a heated silicon top plate.
Referring initially to FIG. 1, a cross-sectional view is shown of a typical plasma etch reactor equipped with a silicon ceiling as a scavenging surface. The silicon ceiling is a source of silicon atoms which scavenge fluorine out of the plasma to thereby provide a desired carbon-to-fluorine ratio forming a carbon-rich polymer impervious to the fluorine in the plasma over the non-oxide (i.e., polysilicon or silicon nitride) film. In a typical etching process, a reactant gas such as C.sub.2 F.sub.6 is excited sufficiently to generate a plasma inside the reactor chamber and to produce ions and free radicals of F and CF.sub.3. The F radicals etch any silicon dioxide film on the wafer, while carbon and fluorine atoms or ions in the plasma combine on the wafer surface to form a polymer.
The polymer disassociates when formed on silicon dioxide surfaces due to the effect of oxygen freed from the silicon dioxide film during the etch process, and due to the effect of fluorine in the plasma. However, when polymer is formed on non-oxide film (i.e., polysilicon or silicon nitride), the polymer accumulates due to the lack of oxygen in the underlying non-oxide film. This formation inhibits etching of the underlying non-oxide film and thereby provides a pronounced etch selectivity of the oxide film over the non-oxide film. The selectivity is of great importance when etching vias through a silicon dioxide layer overlying a non-oxide layer which is not to be etched. The selectively is limited if the polymer formed over the polysilicon layer contains more than 40% fluorine by weight, because such polymers are susceptible to being attacked by fluorine in the plasma, and therefore provide only limited protection to the underlying polysilicon layer.
FIG. 1 shows an inductively coupled plasma etch reactor of the type generally used. The reactor includes a vacuum chamber 10 enclosed by a cylindrical quartz sidewall 12 and a bottom 14 including a cathode assembly on which a silicon wafer 16 is held by a retractable annular holder 18 on a pedestal 19. The ceiling 20 is made of crystalline silicon and heated by an overlying heating element 22 connected to a temperature controller (not shown). A cylindrical aluminum top wall 24 rests on the quartz sidewall 12 and supports an overlying cooling element 26 in which coolant is circulated through water jacket 28 as shown in FIG. 2. This arrangement cools the quartz sidewall 12 through the aluminum cylindrical top wall 24.
A helical cylindrical antenna coil 30 is wrapped around the cylindrical quartz sidewall 12 and is connected to an RF energy source 32 to inductively couple energy to the plasma in the chamber 10. A ceramic cylindrical cover 34 made of materials such as Al.sub.2 O.sub.3 or Si.sub.2 N.sub.4 surrounds the antenna coil 30.
A gate valve-vacuum pump assembly 36 draws gas from the chamber 10 through an opening in the chamber body 38 to maintain a vacuum in the chamber 10 through an opening in the chamber body 38 to maintain a vacuum in the chamber 10 determined by a pressure control device 40. A gas feed 42 feeds reactant gases such as C.sub.2 F.sub.6 into the chamber 10.
In order to maintain the temperature of the interior surface of the quartz sidewall 12 well above 170.degree. C. a single heating element (not shown) rests in the interior of the ceramic cover 34 near the bottom of the quartz sidewall 12 and is connected to an electrical source (not shown). The temperature of the heating element is monitored by a thermal sensor 28 which feeds a signal to a controller (not shown).
The temperature of the silicon ceiling 20 determines the rate at which silicon atoms scavenge the plasma within the chamber 10 and therefore affects the carbon-to-flourine plasma ratio providing a polymer carbon content greater than 60% by weight. Such temperature control of the ceiling 20 is provided by a controller governing the ceiling heat source in accordance with a signal received from a thermocouple 44 attached to the silicon ceiling 20. Heat conduction to the silicon ceiling 20 is set by a suitable air gap between the heater 22 and the ceiling 20.
During an etching process, the RF power source 32 used is in the range of 2,000-3,000 watts at about 2 MHz. The bias RF power source 46 connected to the pedestal 19 is in the range of 500-1500 watts at 1.8 MHZ depending on the size of the wafer 16. The silicon ceiling temperature is in the range of 200.degree.-300.degree. C., and is normally set at approximately 260.degree. C. The quartz sidewall interior surface temperature is in the range of between 170.degree. C. and 230.degree. C, and is normally set at 220.degree. C. The C.sub.2 F.sub.6 gas flow rate is between 20-50 standard cubic centimeters per minute and the chamber pressure is between 1-10 millitorr.
In a typical etching process for oxide films, a high density, low pressure plasma is used. The chemistry involved is the dissociation of C.sub.2 F.sub.6 into components of CF.sub.2 F and C. The CF.sub.2 is the active etching component of the gas, while F and C forms a fluorocarbon polymer that deposits on any surface that is relatively cool (i.e., at a temperature of 100.degree. C. or below).
A cross-sectional view of the quartz sidewall 12 which contains the chamber cavity 10 for a conventional plasma etch chamber is shown in FIG. 2. A heating element 50 is contained in the interior of a ceramic cover (not shown) in-between the quartz sidewall 12 and the helical cylindrical antenna 30. In a conventional etcher, or for most other semiconductor process chambers, a single heating element 50 is utilized with its temperature monitored by a single thermal sensor 28. In the chamber cavity 10, processing difficulties frequently occur due to a poor temperature uniformity achieved across the chamber cavity. For instance, during a plasma etching process, where the quartz sidewall 12 is maintained at a temperature well above 170.degree. C. and normally at a temperature of about 220.degree. C. a temperature variation as high as 30.degree. C. within the chamber cavity 10 is observed. This creates a serious problem in a plasma etching process resulting in a large variance in the etch rates at different locations in the cavity. A semiconductor substrate that has a non-uniform top layer is frequently obtained after the etching process. The conventional heating method of utilizing a single heating element monitored by a single thermal sensor is therefore inadequate for achieving a uniform process environment during a semiconductor process, regardless an etching, a deposition or any other process.
It is therefore an object of the present invention to provide an apparatus for controlling temperature of a process chamber in semiconductor processing that does not have the drawbacks or shortcomings of the conventional apparatus.
It is another object of the present invention to provide a process chamber for a semiconductor substrate that contains a cylindrical chamber sidewall which is heated by a plurality of heating elements.
It is a further object of the present invention to provide a process chamber for a semiconductor substrate that is equipped with a cylindrical chamber sidewall heated by at least two heating elements and monitored by at least two thermal sensors.
It is another further object of the present invention to provide a process chamber for a semiconductor substrate that is equipped with a cylindrical chamber sidewall fabricated in quartz and heated by a plurality of heating elements.
It is still another object of the present invention to provide a process chamber for a semiconductor substrate that is equipped with a cylindrical shaped quartz sidewall heated by a plurality of heating elements and energized by a helical cylindrical antenna coil.
It is yet another object of the present invention to provide a method for controlling temperature of a process chamber including the step of mounting a plurality of heating elements juxtaposed to and surround a cylindrical chamber sidewall.
It is still another further object of the present invention to provide a method for controlling temperature of a process chamber including the steps of positioning a plurality of heating elements juxtaposed to and surround a cylindrical chamber sidewall, and mounting a plurality of thermal sensors to the plurality of heating elements with one thermal sensor juxtaposed to each heating element.
It is yet another further object of the present invention to provide a plasma etch chamber which includes a cylindrical chamber sidewall, a plurality of heating elements mounted juxtaposed to the sidewall, a plurality of thermal sensors with one mounted to each of the plurality of heating elements, and a temperature controller for controlling temperature of the chamber cavity.